This Friday - Free on-line training - SystemVerilog/VHDL/SystemC

Webinar: Start date: Duration: Presenter: Summary:

VHDL vs SystemVerilog vs SystemC » October 5, 2012 x1 1 hour session (all time zones covered) John Aynsley, Doulos CTO This webinar will give you an insight into how each of these languages are being used and their relative strengths and weaknesses.

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November 2012

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Webinar: Start date: Duration: Presenter: Summary:

Synthesis-Friendly SystemVerilog » November 2, 2012 x1 1 hour session (all time zones covered) John Aynsley, Doulos CTO This webinar will explore the features of SystemVerilog that are useful for RTL synthesis, showing how the RTL SystemVerilog language constructs have been optimized for productivity and reliability.

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Future on-line training events

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Webinar: Start date: Duration: Presenter: Summary:

Advanced VHDL Verification: OSVVM » TBC x1 1 hour session (all time zones covered) Alan Fitch, Principal Member Technical Staff This webinar will introduce you to Open Source VHDL Verification Methodology (OSVVM): what it does, how to use it, and how it compares with UVM.

Doulos Webinars

'via Blog this'

VMM refresher basics, part 2

Doulos website on VMM has some more good stuff, too:

http://www.doulos.com/knowhow/sysverilog/VMM/

Cheers,
Connie

VMM refresher basics

Here are some basic resources for any functional verification expert wanting a quick VMM-specific refresher:

General: The VMM website: http://www.vmmcentral.org/ is really quite a good site and very download-friendly Especially of note: Useful videos, long and short ones, in lower right hand corner of main page, about VMM in general and the latest VMM features!

Also, more items accessed on sub-pages, highlights below:

VMM Golden Ref Guide (Doulos): http://vmmcentral.org/pdfs/vmm_golden_reference_guide_jan_2010.pdf

I really like these in general, no experience with this specific one. For a quick overview, see the introduction of this manual; for more detail, read on :-)

Various detailed implementation posts in and around: http://www.vmmcentral.org/vmartialarts/2008/11/how-to-use-vmm-callbacks/ is an example. Covers some tricky topics and terminology.

VMM verification methodology: http://www.vmmcentral.org/cgi-bin/download/reg2.cgi?id=Implementation (registration required): I would guess that this is not a light quick read, but I have added it for completeness. :-)

As far as books, I was recommended Ben Cohen's VMM book, and Chris Spear's newest book if System Verilog is also of interest. Janick's book was disrecommended.

This appears to be the introduction, table of contents, &c for Ben Cohen's book, may give you a feel for what is covered:

http://www.systemverilog.us/vmm_adoption/vmm_isbn_0970539495.pdf

Thanks to my consultant friends for the good information they provided. Any errors injected and misinformation are my own work. :-)

Cheers,
Connie