Hi,
Apologies for posting here, but I know the right eyes will see this here, and the TestBuilder forum is a little dead these days... :-)
I am looking for a free unlicensed SystemC/TLM assertion library, in the spirit of the OVL library. What I mean by that is that it covers a similar variety of common assertions, and flags violations of said assumptions in some useful textual or open-source database. It must be usable without licenses in a pure OSCI SystemC simulation. Of course a proper subset of the OVL assertions could still be very useful, so I would still be happy to hear of it.
I do realize that this is all much cleaner and less work if we could simply use System Verilog or PSL OVL/assertions. The customer I am working with intends to set a standard in the use of primarily free tools on a real project, so this is how it goes. I have done a Google search, and found a few grad student papers, but I am discouraged by the lack of any mention on the official OVL/OSCI sites or any other download area, and do not really know if said grad students are even still around.
If you provide something useful, I will do what I can to make you famous on my blog, such as it is, and provide a very cool reference for you if needed. :-)
Feel free to answer at the link below or via email; if you do not object, I will summarize what I view as the best email responses on my blog with proper attribution.
Cheers,
Connie L. O'Dell
Sr. Verification Specialist
c.odell@co-consulting.net
303-641-5191
_____________________________________________
CO Consulting - Boulder, CO - http://co-consulting.net
Not to discourage such an initiative, but why not use plain OVL (Verilog version) with free tool such as Icarus? That would still satisfy your customer's requirement of "free tools". Also since these simple assertions tend to be clock-by-clock you need to get to wire-level details anyhow.
ReplyDeleteJust wondering.
Srini
www.cvcblr.com/blog