DAC May 17th warning and DVcon'13 Trip Report, thanks to John Cooley!

       WARNING -- DAC has cancelled the DAC Free Monday!
       WARNING -- DAC has cancelled the DAC Free Monday!
       WARNING -- DAC has cancelled the DAC Free Monday!

 If you want to still get into this upcoming DAC'13 in Austin, TX,
 you must BY THIS FRIDAY, MAY 17TH use this link to get the free
 "I HEART DAC" tickets:

        http://www.deepchip.com/look/see130410-01.html

 Otherwise, if you show up at DAC they'll charge you $65 to get in.

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  INDUSTRY GADFLY: "Real Intent's not-so-secret DVcon'13 Report"

 Here's Real Intent's not-so-secret DVcon'13 Trip Report which was
 collectly written that covers Wally Rhine's keynote, verification
 project stats, System Verilog, ad-hoc techniques, coverage and
 power measurement, formal tools, UVM, CDC, Harry Foster, ARM, Intel,
 John Goodenough, Gary Smith, "AHA", design breaking, no mention of
 C nor SystemC, Design to Help Verification, RTL, instrumenting, when
 to do formal?, assertion synthesis, no mention of Specman "e", plus
 details from Stu Sutherland's talk on X-optimism, X-pessimism, the
 15 X sources, how X's mess each with constructs with assignments
 with operators, and three different ways to "fix" the X problem;
 plus the DVcon attendance numbers plus who exhibited there, too.

        http://www.deepchip.com/gadfly/gad050913.html

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 DAC Panel - Design leaders on Winning the Hardware Design Race
        http://www.deepchip.com/look/see130430-01.html

 Dini Group now has Quad Virtex-7 FPGAs stackable to 112 M gates
        http://www.deepchip.com/look/see130418-01.html

 Calypto RTL Power Reduction and High Level Synthesis Report 2013
        http://www.deepchip.com/look/see130509-01.html