Design verification, etc., instructional videos from the Doulos Video Gallery

Nice selection of videos, check it out!
I looked at the 2012 DVCon videos on YouTube so far, but it seems kinda Cadence-centric so far.
Like to see more diversity, but maybe they did not record as much video at DVCon this year as past years.  Too bad.  :-)

Video Gallery :

Video Gallery

We have collected together videos from across the site in this gallery. Enjoy!

Topics covered so far:

VHDL

• What's New with VHDL
• NEW VHDL versus SystemVerilog

SystemVerilog

• Making Sense of Transaction Level Modeling in OVM
• Observation in VMM and OVM
• Ten Things You Should Know About OVM
• Using OVM within SystemC for Verification
• Introducing VMM 1.2
• Introduction to UVM - The Universal Verification Methodology
• SystemC versus SystemVerilog
• SystemVerilog as the New Verilog
• NEW VHDL versus SystemVerilog
• NEW How Much SystemVerilog Training Do You Need?
• NEW SystemVerilog for Hardware Synthesis

SystemC TLM-2.0

• SystemC versus SystemVerilog
• What is TLM-2.0?
• TLM-2.0 Interoperability
• RTL vs TLM and AT vs LT
• TLM-2.0 Protocol Checker

ARM Cortex

• ARM Cortex-M1 for FPGAs
• Introduction to CMSIS for ARM Cortex-M
• Using the Cortex-M3/M4 Flash Patch Breakpoint Unit
• Using your C Compiler to Exploit NEON

'via Blog this'